In recent years, digital appliances such as digital televisions have been spreading in general homes. To make products sophisticated and multifunctional holds the key to the spread of the digital appliances.
The performance of the digital appliances can be improved by increasing the speed of digital signal processing. To increase the speed of the digital signal processing can be realized by improving the clock frequencies of system LSIs, expanding the widths of data buses, and using high-speed memories such as DDR (Double Data Rate) memories, for example.
Furthermore, in order to increase the functions of the digital appliances, the high integration densities of circuits are required. To increase the integration densities of the circuits can be realized by placing a plurality of electronic components within one package by techniques such as MCM (Multi Chip Module) or SIP (System In Package), for example.
Although a large number of functions can be carried in the products by increasing the integration densities of the circuits, however, the number of interface signals required for the respective functions to operate also increases. Thus, the number of external terminals provided outside the package also increases. As the number of electronic components accommodated within the package increases, the number of external terminals for inspecting the electronic components also increases. Although the package is electrically connected to external boards through the external terminals, the increase in the number of external terminals makes it difficult to miniaturize the package.
In an IC package in Patent Document 1, for example, therefore, a lower-stage lead terminal is provided on the first layer of a lead board having a double-layer structure, and an upper-stage lead terminal serving as a testing terminal is provided on the second layer thereof. In this configuration, the upper-stage lead terminal provided on the second layer of the lead board is not connected to the circuit board. That is, the testing terminal is provided on the second layer of the lead terminal, to reduce the number of terminals to be provided in a region (on the first layer of the lead board) to which the circuit board is connected. This makes it conceivable that the IC package can be miniaturized.
[Patent Document 1] JP 2000-68440 A